Search - spi vhdl

[VHDL-FPGA-Verilog] FPGASPI

Description: 用FPGA实现主SPI程序,包含开发工程、测试文件和源文件代码-fpga design the SPI code
Platform: | Size: 301056 | Author: Lee | Hits:

Description: Module Function Description: This module allows a SPI ROM to be used in a LX/CS5536 system. Details are below: 1.Provide a memory window to the SPI EPROM at FFF80000h-FFFFFFFFh (512KB). 2.Provide an interface to the SPI bus to allow the SPI EPROM to be programmed. 3.Support DDR2 memory initial process. 4.Support LPC/SPI ROM switch using Hardware pin selection and Software setting method 5.Support LPC Memory Read/Write, LPC I/O Read/Write 6.Support SPI Chip Erase/Byte Program/Write Status/Read Status/Read Array -Module Function Description: This module allows a SPI ROM to be used in a LX/CS5536 system. Details are below: 1.Provide a memory window to the SPI EPROM at FFF80000h-FFFFFFFFh (512KB). 2.Provide an interface to the SPI bus to allow the SPI EPROM to be programmed. 3.Support DDR2 memory initial process. 4.Support LPC/SPI ROM switch using Hardware pin selection and Software setting method 5.Support LPC Memory Read/Write, LPC I/O Read/Write 6.Support SPI Chip Erase/Byte Program/Write Status/Read Status/Read Array
Platform: | Size: 8192 | Author: 吴羽中 | Hits:

[VHDL-FPGA-Verilog] spi_eeprom_conf

Description: 实现spi接口的传输，并多外接EEPROM读写数据-Spi interface to achieve the transfer, and multiple external EEPROM read and write data
Platform: | Size: 2048 | Author: guoguo | Hits:

[VHDL-FPGA-Verilog] spi_master_phy

Description: 这是spi接口传输的一部分内容，本源码一共三部分，功能：spi接口的的实现即对外设的读写数据-This is the spi interface transfer part of the contents of a total of three parts of this source, function: spi interface that the realization of the read and write data to the peripheral
Platform: | Size: 2048 | Author: guoguo | Hits:

[VHDL-FPGA-Verilog] Nios_II_SPI

Description: 本源码为Nios II的开发示例,主要演示Nios II的SPI总线设计。开发环境QuartusII。本示例十分经典，对基于SOPC开发的FPGA初学者有很大帮助。-The source code for the Nios II development of an example, the main demonstration Nios II design of the SPI bus. Development environment QuartusII. This example is very classic, FPGA-based SOPC development of great help for beginners.
Platform: | Size: 16035840 | Author: huangshengqun | Hits:

[MPI] spi_verilog

Description: 实现SPI MASTER功能，并有仿真代码和仿真结果。-To achieve SPI MASTER function, and a simulation code and simulation results.
Platform: | Size: 45056 | Author: davi_insist | Hits:

[VHDL-FPGA-Verilog] ADC_AMP

Description: VHDL code for ADC on Spartan 3E starter kit
Platform: | Size: 2048 | Author: vuu | Hits:

[Embeded-SCM Develop] SPI_TEST

Description: The Serial Peripheral Interface Bus or SPI bus is a synchronous serial data link standard named by Motorola that operates in full duplex mode. Devices communicate in master/slave mode where the master device initiates the data frame. Multiple slave devices are allowed with individual slave select (chip select) lines. Sometimes SPI is called a "four wire" serial bus, contrasting with three, two, and one wire serial buses.-The Serial Peripheral Interface Bus or SPI bus is a synchronous serial data link standard named by Motorola that operates in full duplex mode. Devices communicate in master/slave mode where the master device initiates the data frame. Multiple slave devices are allowed with individual slave select (chip select) lines. Sometimes SPI is called a "four wire" serial bus, contrasting with three, two, and one wire serial buses.
Platform: | Size: 478208 | Author: wei | Hits:

[Com Port] FPGA_SPI_controller

Description: 基于FPGA的SPI协议控制器的设计，主要针对主控制器的设计，采用VHDL语言编写的。-The SPI protocol controller based on FPGA design, mainly for the design of the main controller, using VHDL language.
Platform: | Size: 5120 | Author: xiaopeng | Hits:

[VHDL-FPGA-Verilog] spi

Description: vhdl spi pin configuration
Platform: | Size: 1024 | Author: mohamad | Hits:

[VHDL-FPGA-Verilog] spi.asm

Description: vhdl spi port configuration
Platform: | Size: 2048 | Author: mohamad | Hits:

[VHDL-FPGA-Verilog] spi.sim

Description: vhdl spi cpld simulation
Platform: | Size: 4096 | Author: mohamad | Hits:

[Applications] CPLD

Description: ad采集的小模块，实现串口转并口的功能，串口是SPI的接口-ad collector modoudle ad ad ad ad ad da da da da shuzi moni moni shuzi caiji caiji caiji caiji caiji caiji caiji
Platform: | Size: 32768 | Author: ninglige | Hits:

[VHDL-FPGA-Verilog] spi

Description: 基于CPLD的用SPI控制pwm的源码，用VHDL编写，已经测试，可以直接使用
Platform: | Size: 1024 | Author: DRzhou | Hits:

[VHDL-FPGA-Verilog] SPI_controller

Description: SPI serial flash ROM的verilog源代码, 针对winbond W25x16,已经经过逻辑验证,并实际用在芯片设计中,作为一个模块,正常工作.-SPI serial flash ROM in verilog source code for winbond W25x16, logic has been verified, and actually used in chip design, as a module to work.
Platform: | Size: 8192 | Author: Jerd Hu | Hits:

[VHDL-FPGA-Verilog] SPIVerilogHDL

Description: SPI协议Verilog HDL程序包用Verilog语言实现fpga模拟实现spi协议功能-fpga-spi-verilog
Platform: | Size: 84992 | Author: zhn | Hits:

[VHDL-FPGA-Verilog] SPI

Description: 利用VHDL实现spi，IPcode 的 spi-Using VHDL implementation spi, IPcode the spi
Platform: | Size: 51200 | Author: liwei | Hits:

[VHDL-FPGA-Verilog] Verilog000

Description: FPGA的学习，熟悉QuartusII软件的各种功能，各种逻辑算法设计，接口模块(RS232,LCD,VGA,SPI,I2c等)的设计，时序分析，硬件优化等，自己开始设计简单的FPGA板子。 ③、NiosII的学习，熟悉NiosII的开发流程，熟悉开发软件(SOPC,NiosII IDE),了解NiosII的基本结构，设计NiosII开发板，编写NiosII C语言程序，调试板子各模块功能。-Verilog语言的学习，熟悉Verilog语言的各种语法。 ②、FPGA的学习，熟悉QuartusII软件的各种功能，各种逻辑算法设计，接口模块(RS232,LCD,VGA,SPI,I2c等)的设计，时序分析，硬件优化等，自己开始设计简单的FPGA板子。 ③、NiosII的学习，熟悉NiosII的开发流程，熟悉开发软件(SOPC,NiosII IDE),了解NiosII的基本结构，设计NiosII开发板，编写NiosII C语言程序，调试板子各模块功能。
Platform: | Size: 22794240 | Author: onejacky | Hits:

[VHDL-FPGA-Verilog] l1ghVhVI

Description: The VSPI core implements an SPI interface compatible with the many -- serial EEPROMs, and microcontrollers. The VSPI core is typically used -- as an SPI master, but it can be configured as an SPI slave as well.
Platform: | Size: 226304 | Author: aaa | Hits:

[VHDL-FPGA-Verilog] SPI_verilog_vhdl

Description: spi接口的VHDL和Verilog-HDL源码-VHDL and Verilog-HDL code for spi
Platform: | Size: 13312 | Author: 张文 | Hits:

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[VHDL-FPGA-Verilog] FPGASPI

[VHDL-FPGA-Verilog] LPC2DDR2

[VHDL-FPGA-Verilog] spi_eeprom_conf

[VHDL-FPGA-Verilog] spi_master_phy

[VHDL-FPGA-Verilog] Nios_II_SPI

[MPI] spi_verilog

[VHDL-FPGA-Verilog] ADC_AMP

[Embeded-SCM Develop] SPI_TEST

[Com Port] FPGA_SPI_controller

[VHDL-FPGA-Verilog] spi

[VHDL-FPGA-Verilog] spi.asm

[VHDL-FPGA-Verilog] spi.sim

[Applications] CPLD

[VHDL-FPGA-Verilog] spi

[VHDL-FPGA-Verilog] SPI_controller

[VHDL-FPGA-Verilog] SPIVerilogHDL

[VHDL-FPGA-Verilog] SPI

[VHDL-FPGA-Verilog] Verilog000

[VHDL-FPGA-Verilog] l1ghVhVI

[VHDL-FPGA-Verilog] SPI_verilog_vhdl

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